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Cryptographic Hardware and Embedded Systems – CHES 2005
Efficient Hardware for the Tate Pairing Calculation in Characteristic Three
other
Author(s):
T. Kerins
,
W. P. Marnane
,
E. M. Popovici
,
P. S. L. M. Barreto
Publication date
(Print):
2005
Publisher:
Springer Berlin Heidelberg
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Scholarly Publication Practices and Impact Factor Calculation and Manipulation
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The Arithmetic of Elliptic Curves
Joseph Silverman
(1986)
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Efficient Algorithms for Pairing-Based Cryptosystems
Paulo Barreto
,
Hae Y. Kim
,
Ben Lynn
…
(2002)
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Elliptic Curves in Cryptography
I. Blake
,
G Seroussi
,
N Smart
(2013)
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Book Chapter
Publication date (Print):
2005
Pages
: 412-426
DOI:
10.1007/11545262_30
SO-VID:
2c7acfb8-8489-4a79-b0e9-ea02da37fbc6
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Book chapters
pp. 383
The “Backend Duplication” Method
pp. 30
A Stochastic Model for Differential Side Channel Cryptanalysis
pp. 412
Efficient Hardware for the Tate Pairing Calculation in Characteristic Three
pp. 75
Energy-Efficient Software Implementation of Long Integer Modular Arithmetic
pp. 157
Successfully Attacking Masked AES Hardware Implementations
pp. 172
Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints
pp. 187
Masking at Gate Level in the Presence of Glitches
pp. 293
On Second-Order Differential Power Analysis
pp. 309
Improved Higher-Order Side-Channel Attacks with FPGA Experiments
pp. 339
Data Remanence in Flash Memory Devices
pp. 427
AES on FPGA from the Fastest to the Smallest
pp. 441
A Very Compact S-Box for AES
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