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NASA Formal Methods
First-Order Transitive Closure Axiomatization via Iterative Invariant Injections
other
Author(s):
Aboubakr Achraf El Ghazi
,
Mana Taghdiri
,
Mihai Herda
Publication date
(Online):
April 8 2015
Publisher:
Springer International Publishing
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Complete Instantiation for Quantified Formulas in Satisfiabiliby Modulo Theories
Yeting Ge
,
Leonardo de Moura
(2009)
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IsaPlanner: A Prototype Proof Planner in Isabelle
Lucas Dixon
,
Jacques Fleuriot
(2003)
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The Boundary Between Decidability and Undecidability for Transitive-Closure Logics
Neil Immerman
,
Alex Rabinovich
,
Tom Reps
…
(2004)
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Author and book information
Book Chapter
Publication date (Print):
2015
Publication date (Online):
April 8 2015
Pages
: 143-157
DOI:
10.1007/978-3-319-17524-9_11
SO-VID:
eaf664ad-081e-4b5e-a7f4-1a5431668373
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Book chapters
pp. 12
Developing Verified Software Using Leon
pp. 19
Timely Rollback: Specification and Verification
pp. 35
Sum of Abstract Domains
pp. 50
Reachability Preservation Based Parameter Synthesis for Timed Automata
pp. 66
Compositional Verification of Parameterised Timed Systems
pp. 82
Requirements Analysis of a Quad-Redundant Flight Control System
pp. 97
Partial Order Reduction and Symmetry with Multiple Representatives
pp. 112
Statistical Model Checking of Ad Hoc Routing Protocols in Lossy Grid Networks
pp. 143
First-Order Transitive Closure Axiomatization via Iterative Invariant Injections
pp. 158
Reachability Analysis Using Extremal Rates
pp. 173
Towards Realizability Checking of Contracts Using Theories
pp. 188
Practical Partial Order Reduction for CSP
pp. 204
A Little Language for Testing
pp. 219
Detecting MPI Zero Buffer Incompatibility by SMT Encoding
pp. 234
A Falsification View of Success Typing
pp. 248
Verified ROS-Based Deployment of Platform-Independent Control Systems
pp. 263
A Rigorous Approach to Combining Use Case Modelling and Accident Scenarios
pp. 279
Are We There Yet? Determining the Adequacy of Formalized Requirements and Test Suites
pp. 310
Integrating SMT with Theorem Proving for Analog/Mixed-Signal Circuit Verification
pp. 327
Conflict-Directed Graph Coverage
pp. 343
Shape Analysis with Connectors
pp. 359
Automated Conflict-Free Concurrent Implementation of Timed Component-Based Models
pp. 375
Formal API Specification of the PikeOS Separation Kernel
pp. 393
Data Model Bugs
pp. 400
Predicting and Witnessing Data Races Using CSP
pp. 408
A Benchmark Suite for Hybrid Systems Reachability Analysis
pp. 415
Generalizing a Mathematical Analysis Library in Isabelle/HOL
pp. 422
A Tool for Intersecting Context-Free Grammars and Its Applications
pp. 429
UFIT: A Tool for Modeling Faults in UPPAAL Timed Automata
pp. 436
Blocked Literals Are Universal
pp. 443
Practical Formal Verification of Domain-Specific Language Applications
pp. 450
Reporting Races in Dynamic Partial Order Reduction
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