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Computer Aided Verification
Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions
other
Author(s):
Randal E. Bryant
,
Shuvendu K. Lahiri
,
Sanjit A. Seshia
Publication date
(Online):
September 20 2002
Publisher:
Springer Berlin Heidelberg
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Genome Engineering using CRISPR
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PVS: A prototype verification system
S. Owre
,
J. M. Rushby
,
N Shankar
(1992)
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Automatic verification of pipelined microprocessor control
Jerry R. Burch
,
David Dill
(1994)
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Validity checking for combinations of theories with equality
Clark Barrett
,
David Dill
,
Jeremy R. Levitt
(1996)
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Book Chapter
Publication date (Print):
2002
Publication date (Online):
September 20 2002
Pages
: 78-92
DOI:
10.1007/3-540-45657-0_7
SO-VID:
de8d1bee-d7e6-4c6c-a8a5-436339b5a554
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Book chapters
pp. 65
Symbolic Localization Reduction with Reconstruction Layering and Backtracking
pp. 17
The Quest for Efficient Boolean Satisfiability Solvers
pp. 58
Infinite Games and Verification
pp. 78
Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions
pp. 107
Liveness with (0,1, ∞)- Counter Abstraction
pp. 209
Deciding Separation Formulas with SAT
pp. 223
Probabilistic Verification of Discrete Event Systems Using Acceptance Sampling
pp. 236
Checking Satisfiability of First-Order Formulas by Incremental Translation to SAT
pp. 265
SAT Based Abstraction-Refinement Using ILP and Machine Learning Techniques
pp. 349
The AVISS Security Protocol Analysis Tool
pp. 365
The d/dt Tool for Verification of Hybrid Systems
pp. 414
Synchronous and Bidirectional Component Interfaces
pp. 428
Interface Compatibility Checking for Software Modules
pp. 442
Practical Methods for Proving Program Termination
pp. 485
Vacuum Cleaning CTL Formulae
pp. 500
CVC: A Cooperating Validity Checker
pp. 526
Temporal-Safety Proofs for Systems Code
pp. 539
Extrapolating Tree Transformations
pp. 555
Regular Tree Model Checking
pp. 610
Fair Simulation Minimization
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