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      Computer Aided Verification 

      Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions

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      Springer Berlin Heidelberg

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          PVS: A prototype verification system

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            Automatic verification of pipelined microprocessor control

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              Validity checking for combinations of theories with equality

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                Author and book information

                Book Chapter
                2002
                September 20 2002
                : 78-92
                10.1007/3-540-45657-0_7
                de8d1bee-d7e6-4c6c-a8a5-436339b5a554
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